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PD - 94755
AUTOMOTIVE MOSFET
IRFZ44VZ IRFZ44VZS IRFZ44VZL
HEXFET(R) Power MOSFET
D
Features

Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
G
VDSS = 60V RDS(on) = 12m
S
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
ID = 57A
TO-220AB IRFZ44VZ
D2Pak IRFZ44VZS
TO-262 IRFZ44VZL
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM
Max.
57 40 230 92 0.61 20
Units
A W W/C V mJ A mJ
PD @TC = 25C Power Dissipation Linear Derating Factor VGS Gate-to-Source Voltage EAS (Thermally limited) Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value EAS (Tested ) IAR EAR TJ TSTG Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
h
73 110 See Fig.12a, 12b, 15, 16 -55 to + 175
g i
C 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
Parameter
RJC RCS RJA RJA Junction-to-Case Case-to-Sink, Flat Greased Surface Junction-to-Ambient
Typ.
Max.
1.64 --- 62 40
Units
C/W
i
i
--- 0.50 --- ---
Junction-to-Ambient (PCB Mount)
j
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1
8/25/03
IRFZ44VZS_L
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
60 --- --- 2.0 25 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.061 9.6 --- --- --- --- --- --- 43 11 18 14 62 35 38 4.5 7.5 1690 270 130 1870 260 510 --- --- 12 4.0 --- 20 250 200 -200 65 --- --- --- --- --- --- --- nH --- --- --- --- --- --- --- pF ns nC nA V
Conditions
VGS = 0V, ID = 250A
V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 34A
e
V V A
VDS = VGS, ID = 250A VDS = 25V, ID = 34A VDS = 60V, VGS = 0V VDS = 60V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V ID = 34A VDS = 48V VGS = 10V VDD = 30V ID = 34A RG = 12 VGS = 10V
e e
D G S
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz
VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 48V, = 1.0MHz VGS = 0V, VDS = 0V to 48V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 23 17 57 A 230 1.3 35 26 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 34A, VGS = 0V TJ = 25C, IF = 34A, VDD = 30V di/dt = 100A/s
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFZ44VZS_L
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
BOTTOM
100
BOTTOM
10
10
4.5V
4.5V
1 0.1 1
60s PULSE WIDTH Tj = 25C
1
60s PULSE WIDTH Tj = 175C
0.1 1 10 100
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
60
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ()
50 40
T J = 175C
100
T J = 175C
T J = 25C 30 20
10
T J = 25C VDS = 25V 60s PULSE WIDTH
1 4.0 5.0 6.0 7.0 8.0 9.0
10
VDS = 15V 380s PULSE WIDTH 0 10 20 30 40 50 60
0 ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRFZ44VZS_L
3000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
20
VGS, Gate-to-Source Voltage (V)
ID= 34A VDS= 48V VDS= 30V VDS= 12V
2500
16
C, Capacitance (pF)
2000
Ciss
1500
12
8
1000
4
FOR TEST CIRCUIT SEE FIGURE 13
500
Coss Crss
0 1 10 100
0 0 10 20 30 40 50 60 QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100.0 T J = 175C 10.0
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
10
100sec
1.0
T J = 25C VGS = 0V
1 Tc = 25C Tj = 175C Single Pulse 1 10
1msec 10msec
0.1 0.2 0.6 1.0 1.4 1.8 VSD, Source-toDrain Voltage (V)
0.1
100
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFZ44VZS_L
60 2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
50
ID = 34A VGS = 10V
2.0
ID , Drain Current (A)
40
30
1.5
20
1.0
10
0 25 50 75 100 125 150 175
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20 0.10
0.1
0.05 0.02 0.01
J
R1 R1 J 1 2
R2 R2 C 2
Ri (C/W) i (sec) 0.960 0.00044 0.680 0.00585
1
0.01
Ci= i/Ri Ci i/Ri
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006 1E-005 0.0001 0.001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ44VZS_L
300
EAS, Single Pulse Avalanche Energy (mJ)
15V
250
VDS
L
DRIVER
ID 3.8A 5.0A BOTTOM 34A
TOP
200
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
150
0.01
100
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
50
0 25 50 75 100 125 150 175
Starting T J, Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
4.0
ID = 250A
3.0
Charge
Fig 13a. Basic Gate Charge Waveform
2.0
L DUT
0
VCC
1.0
1K
-75
-50
-25
0
25
50
75
100 125 150 175
T J , Temperature ( C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRFZ44VZS_L
1000
Duty Cycle = Single Pulse
100
Avalanche Current (A)
0.01
10
0.05 0.10
1
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
80
EAR , Avalanche Energy (mJ)
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 34A
60
40
20
0 25 50 75 100 125 150
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRFZ44VZS_L
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFZ44VZS_L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
14.09 (.555) 13.47 (.530)
4.06 (.160) 3.55 (.140)
3X 1.40 (.055) 3X 1.15 (.045) 2.54 (.100) 2X NOTES:
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.92 (.115) 2.64 (.104)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
For GB Production
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INTERNATIONAL RECT IFIER LOGO LOT CODE PART NUMBER
DAT E CODE
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9
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
IRFZ44VZS_L
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN T HE AS S EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
PART NUMBER F530S DAT E CODE
For GB Production
T HIS IS AN IRF530S WIT H LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN T HE AS S EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO LOT CODE
10
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IRFZ44VZS_L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT 1- GATE 2- COLLECTOR
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INT ERNAT IONAL RECTIFIER LOGO AS SEMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
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11
IRFZ44VZS_L
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. Limited by TJmax, starting TJ = 25C, L = 0.12mH This value determined from sample failure population. 100% RG = 25, IAS = 34A, VGS =10V. Part not tested to this value in production. recommended for use above this value. This is only applied to TO-220AB pakcage. Pulse width 1.0ms; duty cycle 2%. This is applied to D2Pak, when mounted on 1" square PCB (FR Coss eff. is a fixed capacitance that gives the 4 or G-10 Material). For recommended footprint and soldering same charging time as Coss while VDS is rising techniques refer to application note #AN-994. from 0 to 80% VDSS . Repetitive rating; pulse width limited by
TO-220AB package is not recommended for Surface Mount Application.
Notes:
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101]market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 08/03
12
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